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TDP0604 Datasheet(PDF) 29 Page - Texas Instruments |
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TDP0604 Datasheet(HTML) 29 Page - Texas Instruments |
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29 / 65 page ![]() Table 8-8. Source Termination Control in I2C mode TX_AC_EN Register TERM Register TXTERM_AUTO_HDMI14 Register Source Termination 0 00 X None 0 01 X Parallel ≈ 300-Ω across P and N 0 10 X Automatic. parallel ≈ 100-Ω across P and N 0 10 1 Automatic. HDMI 1.4. parallel ≈ 300-Ω across P and N 0 10 0 Automatic. HDMI 1.4. No termination if HDMI clock frequency is ≤ fHDMI14_open. 0 10 0 Automatic. HDMI 1.4. Parallel ≈ 300-Ω across P and N termination if HDMI clock frequency is ≥ fHDMI14_300. 0 11 X Parallel ≈ 100-Ω across P and N 1 00 X ≈ 150-Ω to supply (VCC) on both P and N 1 01 X ≈ 150-Ω to supply (VCC) on both P and N 1 10 X Automatic. ≈ 150-Ω to supply (VCC) on both P and N for HDMI 1.4. Otherwise ≈ 50-Ω to supply (VCC) on both P and N. 1 11 X ≈ 50-Ω to supply (VCC) on both P and N Table 8-9. Automatic Source Termination Control in Pin-Strap Mode HDMI Mode AC_EN pin Source Termination HDMI 1.4 0 None or parallel ≈ 300-Ω across P and N depending on state of SCL/CFG0 pin HDMI 2.0 0 Parallel ≈ 100-Ω across P and N HDMI 1.4 1 ≈ 150-Ω to supply (VCC) on both P and N HDMI 2.0 1 ≈ 50-Ω to supply (VCC) on both P and N 8.3.11.3 TX Slew Rate Control The TDP0604 has the ability to slow down the TMDS output edge rates. In pin-strap mode the TX slew rate can not be controlled. In I2C mode both clock and data lanes slew rate can be controlled from a register. Table 8-10 shows the supported settings for each slew rate register based on HDMI data rate. The TDP0604 must be configured in limited redriver mode to control the TX slew rate. Table 8-10. I2C Mode TX Slew Register Supported Settings HDMI Datarate SLEW_CLK register SLEW_3G register SLEW_6G register HDMI 1.4 3'b000 through 3'b011 3'b010 through 3'b101 N/A HDMI 2.0 3'b000 through 3'b011 N/A 3'b011 through 3'b110 8.3.11.4 TX Pre-Emphasis and De-Emphasis Control The TDP0604 provides pre-emphasis and de-emphasis on the data lanes allowing the output signal pre- conditioning to offset interconnect losses between the TDP0604 outputs and a TMDS receiver. Pre-emphasis and de-emphasis is not implemented on the clock lane. There are two methods to implement pre-emphasis, pin strapping or through I2C programming. TX pre-emphasis and de-emphasis control is only supported in limited mode. When using pin strap mode, the TXPRE pin controls four different global pre-emphasis and de-emphasis values for all data lanes when TDP0604 is operating in HDMI 1.4 or HDMI 2.0. These pre-emphasis and de-emphasis values are described in Table 8-11. www.ti.com TDP0604 SLLSFJ8 – DECEMBER 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 29 Product Folder Links: TDP0604 |
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