TDP0604 datasheet(6/65 Pages) TI

6 / 65 page

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)(1)

MIN

MAX

UNIT

Supply Voltage

VCC and VIO

-0.5

Input Voltage

Differential Inputs (IN_D[2:0], IN_CLK)

-0.3

Output voltage

HPD_OUT output

–0.3

Output voltage

Differential outputs (OUT_D[2:0], OUT_CLK)

–0.3

Control pins

LV_DDC_SDA, LV_DDC_SCL, SCL/CFG0, SDA/CFG1, MODE,

CLTEMAP_SEL, HPDOUT_SEL, TXSWG, TXPRE, EQ1, ADDR/

EQ0, EN, AC_EN, LINEAR_EN

–0.5

HPD_IN

–0.5

TDP0604 Junction temperature

105

°C

TDP0604I Junction temperature

125

°C

Tstg

Storage temperature

–65

150

°C

(1)

Operation outside the Absolute Maximum Rating may cause permanent damage to the device. Absolute maximum ratings do not

imply functional operation of the device at these or any other conditions beyond those listed under the Recommended Operating

Condition. If briefly operating outside the Recommended Operating Conditions but within the Absolute Maximum Ratings, the device

may not sustain damage, but it may not be fully functional. Operating the device in this manner may affect device reliability,

functionality, performance, and shorten the device lifetime.

6.2 ESD Ratings

VALUE

UNIT

V(ESD)

Electrostatic discharge

Human body model (HBM), per ANSI/ESDA/

JEDEC JS-001, all pins(1)

±4000

Charged device model (CDM), per ANSI/ESDA/

JEDEC JS-002, all pins(2)

±1500

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

VCC

Supply voltage when high-speed RX pins (IN_D[2:0] and IN_CLK) is AC-

coupled to a DP++ TX

3.0

3.3

3.6

VCC

Supply voltage when high-speed RX pins (IN_D[2:0] and IN_CLK) is DC-

coupled to a HDMI TX

3.135

3.3

3.465

VIO

VIO supply when 1.2-V LVCMOS level used.

1.14

1.2

1.26

VIO

VIO supply when 1.8-V LVCMOS level used.

1.7

1.8

1.9

VIO

VIO supply when 3.3-V LVCMOS level used.

3.3

3.6

VPSN

Peak to peak Power supply noise on VCC pins (less than 4 MHz).

100

VCTL3

DC input voltage for SCL/CFG0, SDA/CFG1, MODE, AC_EN, LINEAR_EN,

EN, CTLEMAP_SEL, TXSWG, TXPRE, EQ1, ADDR1/EQ0, LV_DDC_SCL,

LV_DDC_SDA, HPDOUT_SEL

–0.3

3.6

VCTL5

DC input voltage for HV_DDC_SCL, HV_DDC_SDA, HPD_IN pins

–0.3

5.5

CACRX

Optional external AC-coupling capacitor on IN_Dx and IN_CLK.

253

CACTX

External AC-coupling capacitor on OUT_Dx and OUT_CLK when AC_EN =

253

TDP0604 Ambient temperature

°C

TDP0604

SLLSFJ8 – DECEMBER 2021

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