FS6407 datasheet(26/111 Pages) NXP

26 / 111 page

NXP Semiconductors

FS6407/FS6408

Figure 8. IO_2:3 MCU error monitoring: bi-stable protocol

• IO_4:5 are selectable as follows:

Digital input (logic level) sent to the MCU through the SPI. Wake-up input (load dump proof) on rising or falling edge or based on

previous state. Output gate driver (from VPRE) for low-side logic level MOSFET. Safety purpose: Digital input (logic level) to perform

an IC error monitoring (both IO_4 AND IO_5 are used if configured as safety inputs, see Figure 9).

Figure 9. External error signal handling

5.14

SAFE output pins (FS0B, RSTB)

FS0B is asserted low when a fault event occurs (See Faults triggering FS0B activation on page 40). The objective of this pin is to drive

an electrical safe circuitry independent from the MCU to deactivate the whole system and set the application in a protected and known

state.

After each power on reset or after each wake-up event (LPOFF), the FS0B pin is asserted low. The MCU can then decide to release the

FS0B pin, when the application is ready to start. An external pull-up circuitry is mandatory connected to VDDIO or VSUP3.

• If the pull-up is connected to VDDIO, the value recommended is 5.0 k

Ω. There is no current in LPOFF since VDDIO is OFF in the

LPOFF mode.

• If the pull-up is connected to VSUP3, the value must be above 10 k

Ω. There is a current in the pull-up resistor to consider at the

application level in LPOFF mode.

FCCU_eout[0]

FCCU_eout[1]

Reset Phase

Normal Phase

Error Phase

Config Phase

FS6407/FS6408 Internal

IO_4 signal latched

Error signal (IO_4 input)

Acknowledgment counter

Acknowledgement signal

from MCU (IO_5 input)

Filter time

Reset

counter

Restart Acknowledgment

counter

FS0b

RSTb

The error is acknowledged by the MCU

then, internal IO_4 signal is released

The error is NOT

acknowledged by the MCU

So, FS0b is activated at the

end of the counter

FS6407 Datasheet(PDF) 26 Page - NXP Semiconductors

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