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FS6407 Datasheet(PDF) 82 Page - NXP Semiconductors

Part # FS6407
Description  Power system basis chip with high speed can transceiver
PDF  111 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS6407 Datasheet(HTML) 82 Page - NXP Semiconductors

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NXP Semiconductors
FS6407/FS6408
7.3.19 Vreg mode
Table 52. MODE. Description and configuration of the bits (default value in bold)
Goto_LPOFF
Description
Configure the device in Low Power mode VREG OFF (LPOFF)
0No action
1LPOFF mode
Reset condition
Power On Reset
INIT
Description
Report if INIT mode of the main logic state machine is entered
0
Not in INIT mode
1
INIT MODE
Reset condition
Power On Reset
Normal
Description
Report if Normal mode of the main logic state machine is entered
0
Not in Normal mode
1
Normal mode
Reset condition
Power On Reset
INT_request
Description
Request for an INT pulse
0
No Request
1
Request for an INT pulse
Reset condition
Power On Reset
Secure 3:0
Description
Secured bits based on write bits
Secured_3 = NOT(bit5)
Secured_2 = NOT(bit4)
Secured_1 = bit7
Secured_0 = bit6
Table 53. VREG MODE register description
Write
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
MOSI
1
0
1
0
110
P
Vcore_
EN
Vcca_
EN
Vaux_
EN
Vcan_
EN
Secure
_3
Secure
_2
Secure
_1
Secure
_0
MISO
SPI_G
WU
CAN_
G
Reserve
d
IO_G
Vpre_
G
Vcore_
G
Vother
s_G
Reserv
ed
Reserv
ed
Reserv
ed
Reserv
ed
Vcore_
EN
Vcca_
EN
Vaux_
EN
Vcan_
EN
Read
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
MOSI
0
0
1
0
110
00
000
00
00
MISO
SPI_G
WU
CAN_
G
Reserve
d
IO_G
Vpre_
G
Vcore_
G
Vother
s_G
Reserv
ed
Reserv
ed
Reserv
ed
Reserv
ed
Vcore_
EN
Vcca_
EN
Vaux_
EN
Vcan_
EN



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