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FS6407 Datasheet(PDF) 90 Page - NXP Semiconductors |
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FS6407 Datasheet(HTML) 90 Page - NXP Semiconductors |
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90 / 111 page  90 NXP Semiconductors FS6407/FS6408 7.3.26 Init FSSM1 SPI_FS_Req Description Invalid SPI access (Wrong Write or Read, Write to INIT registers in normal mode, wrong address), concerns fail-safe logic only 0No error 1 SPI violation Reset condition Power On Reset SPI_FS_Parity Description SPI parity bit error detection, concerns fail-safe logic only 0 Parity bit OK 1 Parity bit ERROR Reset condition Power On Reset Table 67. INIT FSSM1 register description Write bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 MOSI 11 0 0 1 00 P IO_01_ FS IO_1_F S IO_45_ FS RSTb_l ow Secure _3 Secure _2 Secure _1 Secure _0 MISO SPI_G WU CAN_ G Reserved IO_G Vpre_ G Vcore_ G Vother s_G SPI_F S_err SPI_F S_CLK SPI_F S_req SPI_F S_Parit y IO_01_ FS IO_1_F S IO_45_ FS RSTb_l ow Read bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 MOSI 01 0 0 1 00 00 00 00 00 0 MISO SPI_G WU CAN_ G Reserved IO_G Vpre_ G Vcore_ G Vother s_G SPI_F S_err SPI_F S_CLK SPI_F S_req SPI_F S_Parit y IO_01_ FS IO_1_F S IO_45_ FS RSTb_l ow Table 68. INIT FSSM1. Description and configuration of the bits (default value in bold) IO_01_FS Description Configure the couple of IO_1:0 as safety inputs 0NOT SAFETY 1 SAFETY CRITICAL Reset condition Power On Reset IO_1_FS Description Configure IO_1 as safety inputs 0NOT SAFETY 1 SAFETY CRITICAL (External resistor bridge monitoring active) Reset condition Power On Reset IO_45_FS Description Configure the couple of IO_5:4 as safety inputs 0NOT SAFETY 1 SAFETY CRITICAL Reset condition Power On Reset Table 66. INIT SUPERVISOR3. Description and configuration of the bits (default value in bold) (continued) |
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