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FS6407 Datasheet(PDF) 75 Page - NXP Semiconductors

Part # FS6407
Description  Power system basis chip with high speed can transceiver
PDF  111 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

FS6407 Datasheet(HTML) 75 Page - NXP Semiconductors

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NXP Semiconductors
75
FS6407/FS6408
7.3.11 Status VREG2
Table 36. Status VREG1. Description and configuration of the bits (default value in bold)
ILIM_PRE
Description
Report a current limitation condition on VPRE
0
No current limitation (IPRE_PK < IPRE_LIM)
1
Current limitation (IPRE_PK > IPRE_LIM)
Reset condition
Power On Reset / Read
TWARN_PRE
Description
Report a thermal warning from VPRE
0
No thermal warning (TJ < TWARN_PRE)
1
Thermal warning (TJ > TWARN_PRE)
Reset condition
Power On Reset / Read
BoB
Description
Report a running mode of VPRE
0Buck
1Boost
Reset condition
Power On Reset
VPRE_STATE
Description
Report the activation state of VPRE SMPS
0SMPS OFF
1SMPS ON
Reset condition
Power On Reset
Table 37. STATUS VREG2 register description
Read
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
MOSI
00
0
1
101
000
00
000
0
MISO
SPI_G
WU
CAN_
G
Reserve
d
IO_G
Vpre_
G
Vcore_
G
Vother
s_G
Ilim_co
re
Twarn_
core
Vcore_
state
Twarn_
cca
Ilim_cc
a
Ilim_au
x
Ilim_ca
n
0
Table 38. Status VREG2. Description and configuration of the bits (default value in bold)
ILIM_CORE
Description
Report a current limitation condition on VCORE
0
No current limitation (ICORE_PK < ICORE_LIM)
1
Current limitation (ICORE_PK > ICORE_LIM)
Reset condition
Power On Reset / Read
TWARN_CORE
Description
Report a thermal warning from VCORE
0
No thermal warning (TJ < TWARN_CORE)
1
Thermal warning (TJ > TWARN_CORE)
Reset condition
Power On Reset / Read
VCORE_STATE
Description
Report the activation state of VCORE SMPS
0SMPS OFF
1SMPS ON
Reset condition
Power On Reset



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