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FS6407 Datasheet(PDF) 74 Page - NXP Semiconductors |
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FS6407 Datasheet(HTML) 74 Page - NXP Semiconductors |
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74 / 111 page ![]() 74 NXP Semiconductors FS6407/FS6408 7.3.10 Status VREG1 Table 34. IO input. Description and configuration of the bits IO_5 Description Report IO_5 digital state in Normal mode. No update in LPOFF mode since wake-up features available 0 Low 1High Reset condition Power On Reset IO_4 Description Report IO_4 digital state in Normal mode. No update in LPOFF mode since wake-up features available 0 Low 1High Reset condition Power On Reset IO_3 Description Report IO_3 digital state in Normal mode. No update in LPOFF mode since wake-up features available 0 Low 1High Reset condition Power On Reset IO_2 Description Report IO_2 digital state in Normal mode. No update in LPOFF mode since wake-up features available 0 Low 1High Reset condition Power On Reset IO_1 Description Report IO_1 digital state in Normal mode. No update in LPOFF mode since wake-up features available 0 Low 1High Reset condition Power On Reset IO_0 Description Report IO_0 digital state in Normal mode. No update in LPOFF mode since wake-up features available 0 Low 1High Reset condition Power On Reset Table 35. STATUS VREG1 register description Read bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 MOSI 00 01 1 0 0 0 0 0 0 0 0 0 0 0 MISO SPI_ G WU CAN_ G Rese rved IO_G Vpre_ G Vcore_ G Vothers_ G Reserve d Ilim_pre Twarn_pr e BoB Vpre_stat e 00 0 |
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