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FS6407 Datasheet(PDF) 95 Page - NXP Semiconductors |
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FS6407 Datasheet(HTML) 95 Page - NXP Semiconductors |
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95 / 111 page  NXP Semiconductors 95 FS6407/FS6408 7.3.29 WD_LFSR 7.3.30 WD answer Table 73. WD LFSR register description Write bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 MOSI 110 0 111 P WD_LF SR_7 WD_LF SR_6 WD_LF SR_5 WD_LF SR_4 WD_LF SR_3 WD_LF SR_2 WD_LF SR_1 WD_LF SR_0 MISO SPI_G WU CAN_ G Reserve d IO_G Vpre_ G Vcore_ G Vother s_G WD_LF SR_7 WD_LF SR_6 WD_LF SR_5 WD_LF SR_4 WD_LF SR_3 WD_LF SR_2 WD_LF SR_1 WD_LF SR_0 Read bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 MOSI 010 0 111000000 000 MISO SPI_G WU CAN_ G Reserve d IO_G Vpre_ G Vcore_ G Vother s_G WD_LF SR_7 WD_LF SR_6 WD_LF SR_5 WD_LF SR_4 WD_LF SR_3 WD_LF SR_2 WD_LF SR_1 WD_LF SR_0 Table 74. WD LFSR. Description and configuration of the bits (default value in bold) WD_LFSR_7:0 Description WD 8 bits LFSR value. Used to write the seed at any time 0... bit7:bit0: 10110010 default value at start-up or after a Power on reset: 0xB2 (23), (24) 1... Reset condition Power On Reset Notes 23. Value Bit7:Bit0: 1111 1111 is prohibited. 24. During a write command, MISO reports the previous register content. Table 75. WD answer register description Write bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 MOSI 11010 00 P WD_an swer_7 WD_an swer_6 WD_an swer_5 WD_an swer_4 WD_an swer_3 WD_an swer_2 WD_an swer_1 WD_an swer_0 MISO SPI_G WU CAN_G Reserv ed IO_G Vpre_G Vcore_ G Vothers _G RSTb FS0 WD FS0_G IO_FS_ G 0 FS_EC C FS_reg _Ecc Read bit15 bit14 bit13 bit12 bit11 bit10 bit9 bit8 bit7 bit6 bit5 bit4 bit3 bit2 bit1 bit0 MOSI 01010 00000 00000 0 MISO SPI_G WU CAN_G Reserv ed IO_G Vpre_G Vcore_ G Vothers _G RSTb FS0 WD FS0_G IO_FS_ G 0 FS_EC C FS_reg _Ecc |
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