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ATMEGA640 Datasheet(PDF) 160 Page - ATMEL Corporation |
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ATMEGA640 Datasheet(HTML) 160 Page - ATMEL Corporation |
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160 / 449 page  160 ATmega640/1280/1281/2560/2561 2549K–AVR–01/07 Register Description TCCR1A – Timer/Counter 1 Control Register A TCCR3A – Timer/Counter 3 Control Register A TCCR4A – Timer/Counter 4 Control Register A TCCR5A – Timer/Counter 5 Control Register A • Bit 7:6 – COMnA1:0: Compare Output Mode for Channel A • Bit 5:4 – COMnB1:0: Compare Output Mode for Channel B • Bit 3:2 – COMnC1:0: Compare Output Mode for Channel C The COMnA1:0, COMnB1:0, and COMnC1:0 control the output compare pins (OCnA, OCnB, and OCnC respectively) behavior. If one or both of the COMnA1:0 bits are writ- ten to one, the OCnA output overrides the normal port functionality of the I/O pin it is connected to. If one or both of the COMnB1:0 bits are written to one, the OCnB output overrides the normal port functionality of the I/O pin it is connected to. If one or both of the COMnC1:0 bits are written to one, the OCnC output overrides the normal port func- tionality of the I/O pin it is connected to. However, note that the Data Direction Register (DDR) bit corresponding to the OCnA, OCnB or OCnC pin must be set in order to enable the output driver. When the OCnA, OCnB or OCnC is connected to the pin, the function of the COMnx1:0 bits is dependent of the WGMn3:0 bits setting. Table 83 shows the COMnx1:0 bit func- tionality when the WGMn3:0 bits are set to a normal or a CTC mode (non-PWM). • Bit 1:0 – WGMn1:0: Waveform Generation Mode Combined with the WGMn3:2 bits found in the TCCRnB Register, these bits control the counting sequence of the counter, the source for maximum (TOP) counter value, and what type of waveform generation to be used, see Table 82. Modes of operation sup- ported by the Timer/Counter unit are: Normal mode (counter), Clear Timer on Compare match (CTC) mode, and three types of Pulse Width Modulation (PWM) modes. For more information on the different modes, see “Modes of Operation” on page 149. Bit 7654 3 2 1 0 (0x80) COM1A1 COM1A0 COM1B1 COM1B0 COM1C1 COM1C0 WGM11 WGM10 TCCR1A Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0000 0 0 0 0 Bit 7654 3 2 1 0 (0x90) COM3A1 COM3A0 COM3B1 COM3B0 COM3C1 COM3C0 WGM31 WGM30 TCCR3A Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0000 0 0 0 0 Bit 7654 3 2 1 0 (0xA0) COM4A1 COM4A0 COM4B1 COM4B0 COM4C1 COM4C0 WGM41 WGM40 TCCR4A Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0000 0 0 0 0 Bit 7654 3 2 1 0 (0x120) COM5A1 COM5A0 COM5B1 COM5B0 COM5C1 COM5C0 WGM51 WGM50 TCCR5A Read/Write R/W R/W R/W R/W R/W R/W R/W R/W Initial Value 0000 0 0 0 0 |
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