XRT79L71IB datasheet(34/434 Pages) EXAR

34 / 434 page

XRT79L71

1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION

REV. 1.0.0

Interrupt Write to Clear/

RUR

R/W

Interrupt - Write to Clear/RUR Select:

This READ/WRITE bit-field permits the user to configure all of

the Source-Level Interrupt Status bits (within the XRT79L71) to

either be Write to Clear (WTC) or Reset-upon-Read (RUR) bits.

0 - Configures all Source-Level Interrupt Status register bits to

function as Reset-upon-Read (RUR).

1 - Configures all Source-Level Interrupt Status register bits to

function as Write-to-Clear (WTC).

Enable Interrupt Clear

R/W

Enable Auto-Clear of Interrupts Select:

This READ/WRITE bit-field permits the user to configure the

XRT79L71 to automatically disable all interrupts that are acti-

vated.

0 - Configures the chip to NOT automatically disable any Inter-

rupts following their activation.

1 - Configures the chip to automatically disable all Interrupts fol-

lowing their activation.

Interrupt Enable

R/W

Interrupt Enable:

This READ/WRITE bit-field permits the user to configure the

XRT79L71 to generate interrupt requests to the Microprocessor.

0 - Configures the chip to NOT generate interrupt to the Micro-

processor. All interrupts are disabled and the Microprocessor

must poll the register bits.

1 - Configures the chip to generate interrupts to the Microproces-

sor.

Operation Control - Loop-back Control Register (Address = 0x0102)

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

Unused

Loop-back Control [3:0]

R/O

R/W

BIT NUMBER

NAME

TYPE

DESCRIPTION

7 - 4

Unused

R/O

BIT NUMBER

NAME

TYPE

DESCRIPTION

XRT79L71IB Datasheet(PDF) 34 Page - Exar Corporation

XRT79L71IB Datasheet(HTML) 34 Page - Exar Corporation

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