XRT79L71IB datasheet(62/434 Pages) EXAR

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XRT79L71

1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION

REV. 1.0.0

Multi-PHY Polling Enable

R/W

Multi-PHY Polling Enable:

This READ/WRITE bit-field permits the user to either enable or

disable Multi-PHY Polling for the Transmit UTOPIA Interface

block. If the user implements this feature (and configures the

XRT79L71 to operate in the Multi-PHY Mode) then the TxUClav

output pin will be driven (either "High" or "Low") based upon the

fill-status of the Transmit FIFO within the Channel that corre-

sponds to the Transmit UTOPIA Address that is currently being

applied to the TxUAddr[4:0] input pins.

If the user does not implement this feature (and then configures

the XRT79L71 to operate in the Single-PHY Mode), then the

TxUClav output pin will unconditionally reflect the Transmit FIFO

fill-status for Channel 0. No attention will be paid to the address

values placed upon the TxUAddr[4:0] input pins.

0 - Configures the Transmit UTOPIA Interface block to operate in

the Single-PHY Mode.

1 - Configures the Transmit UTOPIA Interface block to operate in

the Multi-PHY Mode.

Back-to-Back Polling

Enable

R/W

Back-to-Back Polling Enable:

This READ/WRITE bit-field permits the user to configure the

Transmit UTOPIA Interface block to support Back-to-Back Poll-

ing.

Ordinarily, for Multi-PHY polling, the user is required to interleave

all UTOPIA Address values (that are to be placed on the TxU-

Addr[4:0] input pins) with the NULL Address (e.g., 0x1F). How-

ever, if the user configures the Transmit UTOPIA Interface block

to operate in the UTOPIA Level 3 Mode, and if the user also

enables Back-to-Back Polling, then the user does not need inter-

leave the UTOPIA Addresses with the NULL Address. In this

case, the user can simply apply a back-to-back stream of rele-

vant UTOPIA Addresses to the TxUAddr[4:0] input pins, and the

XRT79L71 will respond by driving the TxUClav output pins to the

appropriate states (depending upon the Transmit FIFO fill-sta-

tus).

0 - Disables Back-to-Back Polling. In this mode, the user must

interleave all UTOPIA Addresses (that are to be applied to the

TxUAddr[4:0] input pins) with the NULL Address.

1 - Enables Back-to-Back Polling. In this mode, the user does

not need to interleave all UTOPIA Addresses (that are to be

applied to the TxUAddr[4:0] input pins) with the NULL Address.

NOTE: In order to configure the Transmit UTOPIA Interface block

to operate in the Back-to-Back Polling Mode, the user

must also do the following.

a. Configure the Transmit UTOPIA Interface to operate in the

UTOPIA Level 3 Mode. This is accomplished by setting

Bit 7 (UTOPIA Level 3 Disable) within this Register to "0".

b. Configure the Transmit UTOPIA Interface to support Multi-

PHY Polling. This is accomplished by setting Bit 6 (Multi-

PHY Polling Enable) within this register to "1".

Direct Status Indication

Enable

R/W

BIT NUMBER

NAME

TYPE

DESCRIPTION

XRT79L71IB Datasheet(PDF) 62 Page - Exar Corporation

XRT79L71IB Datasheet(HTML) 62 Page - Exar Corporation

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