XRT79L71IB datasheet(75/434 Pages) EXAR

75 / 434 page

XRT79L71

REV. 1.0.0

1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION

Frame Format

R/W

Frame Format:

This READ/WRITE bit-field, along with Bit 6 (IsDS3), permits the

user to configure the both the Receive DS3/E3 Framer and the

Transmit DS3/E3 Framer blocks to operate in the appropriate

framing format. The relationship between the state of this bit-

field, Bit 2 and the resulting framing format is presented below.

NOTE: These bit settings also configure the Transmit DS3/E3

LIU and Receive DS3/E3 LIU Blocks into either the DS3

or E3 Modes.

1 - 0

TimRefSel[1:0]

R/W

Time Reference Select:

These two READ/WRITE bit-fields permit the user to define both

the timing source and the framing-alignment source for the

Transmit DS3/E3 Framer block, as presented below.

BIT NUMBER

NAME

TYPE

DESCRIPTION

Bit 2 (Frame

Format)

Bit 6 (IsDS3)

Framing Format

E3, ITU-T G.751

E3, ITU-T G.832

DS3, C-bit Parity

DS3, M13

Loop-Timing (Transmit

DS3/E3 Framer block

timing is taken from the

Receive DS3/E3 LIU

block)

The Transmit DS3/E3

Framer block will initiate

the generation of a given

"outbound" DS3/E3 frame,

based upon a clock signal

that is asynchronous with

respect to any externally

supplied signal

TimRefSel[1:0]

Timing Reference

Framing Reference

The TxInClk input pin will

function as the Timing

Source for the Transmit

DS3/E3 Framer block

The Transmit DS3/E3

Framer block will generate

a new DS3/E3 frame upon

the rising edge of the

TxFrameRef Input

The Transmit DS3/E3

Framer block will generate

a new DS3/E3 frame upon

the rising edge of the

TxFrameRef Input

The TxInClk input pin will

function as the Timing

Source for the Transmit

DS3/E3 Framer block

Asynchronous

The TxInClk input pin will

function as the Timing

Source for the Transmit

DS3/E3 Framer block

Asynchronous

XRT79L71IB Datasheet(PDF) 75 Page - Exar Corporation

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