XRT79L71IB datasheet(94/434 Pages) EXAR

94 / 434 page

XRT79L71

1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION

REV. 1.0.0

Receive LAPD Interrupt

Enable

R/W

Receive LAPD Message Interrupt Enable:

This READ/WRITE bit-field permits the user to either enable or

disable the Receive LAPD Message Interrupt. If the user

enables this interrupt, then the channel will generate an inter-

rupt, anytime the Receive LAPD Controller block receives a new

PMDL Message.

0 - Disables the Receive LAPD Message Interrupt.

1 - Enables the Receive LAPD Message Interrupt.

NOTE: This bit-field is only active if the XRT79L71 has been

configured to operate in the DS3, C-bit Parity Framing

format.

Receive LAPD Interrupt

Status

RUR

Receive LAPD Message Interrupt Status:

This RESET-upon-READ bit-field indicates whether or not the

Receive LAPD Message Interrupt has occurred since the last

read of this register.

0 - Receive LAPD Message Interrupt has NOT occurred since

the last read of this register.

1 - Receive LAPD Message Interrupt has occurred since the last

read of this register.

NOTE: This bit-field is only active if the XRT79L71 has been

configured to operate in the DS3, C-bit Parity Framing

format.

Receive DS3 LAPD Status Register (Address = 0x1119)

BIT 7

BIT 6

BIT 5

BIT 4

BIT 3

BIT 2

BIT 1

BIT 0

Unused

RxABORT

RxLAPDType[1:0]

RxCRType

RxFCS

Error

End of

Message

Flag

Present

R/O

BIT NUMBER

NAME

TYPE

DESCRIPTION

Unused

R/O

BIT NUMBER

NAME

TYPE

DESCRIPTION

XRT79L71IB Datasheet(PDF) 94 Page - Exar Corporation

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