XRT79L71IB datasheet(5/434 Pages) EXAR

5 / 434 page

XRT79L71

REV. 1.0.0

1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-CHANNEL FRAMER IC - REGISTER/MAP DESCRIPTION

TABLE OF CONTENTS

GENERAL DESCRIPTION................................................................................................. 1

GENERAL FEATURES: .............................................................................................................................. 1

Line Interface Unit ....................................................................................................................................................... 1

DS3/E3 Framer ........................................................................................................................................................... 1

ATM/PPP Protocol Processor ..................................................................................................................................... 1

Transmit Cell Processing............................................................................................................................................. 1

Receive Cell Processing.............................................................................................................................................. 2

Transmit Packet Processing........................................................................................................................................ 2

Receive Packet Processing......................................................................................................................................... 2

Utopia/ System Interface ............................................................................................................................................. 2

Serial Interface ............................................................................................................................................................ 2

APPLICATIONS........................................................................................................................................... 2

FIGURE 1. BLOCK DIAGRAM OF THE XRT79L71 ............................................................................................................................... 2

RODUCT ORDERING INFORMATION.....................................................................................................3

TABLE 1: PIN OUT OF THE XRT79L71 (TOP VIEW) ........................................................................................................................ 3

TABLE OF CONTENTS ............................................................................................................ I

1.0 BRIEF XRT79L71 ARCHITECTURE DESCRIPTION (SEE 79L71 PRODUCT BRIEF) ....................... 5

2.0 INTERRUPT STRUCTURE WITHIN THE XRT79L71 (SEE 79L71 PRODUCT BRIEF) ....................... 5

3.0 REGISTER MAP/DESCRIPTION OF THE XRT79L71 1-CHANNEL DS3/E3 ATM UNI/PPP/CLEAR-

CHANNEL FRAMER WITH LIU IC .......................................................................................................... 5

COMMONCONTROL REGISTERS OF THE XRT79L71 ........................................................................................ 5

CHANNEL CONTROL REGISTERS..................................................................................................................... 6

CHANNEL CONTROL REGISTERS..................................................................................................................... 7

LIU/JITTER ATTENUATOR CONTROL REGISTERS .............................................................................. 11

RECEIVE ATM CELL PROCESSOR/PPP PROCESSOR BLOCK CONTROL REGISTERS................... 11

TRANSMIT ATM CELL PROCESSOR/PPP PROCESSOR BLOCK CONTROL REGISTERS ................ 20

OPERATION BLOCK INTERRUPT REGISTER BIT FORMATS .................................... 24

................................................................................................................................................................... 24

................................................................................................................................................................... 25

................................................................................................................................................................... 26

................................................................................................................................................................... 27

................................................................................................................................................................... 28

................................................................................................................................................................... 29

................................................................................................................................................................... 30

CHANNEL INTERRUPT INDICATION REGISTERS ....................................................... 32

................................................................................................................................................................... 32

................................................................................................................................................................... 33

................................................................................................................................................................... 34

................................................................................................................................................................... 36

RECEIVE UTOPIA INTERFACE BLOCK - ATM UNI APPLICATIONS .......................... 39

TABLE 2: RECEIVE UTOPIA INTERFACE BLOCK - REGISTER/ADDRESS MAP - ATM UNI APPLICATIONS............................................ 39

................................................................................................................................................................... 40

................................................................................................................................................................... 43

THE RECEIVE POS-PHY INTERFACE BLOCK - PPP APPLICATIONS ....................... 45

RECEIVE POS-PHY INTERFACE BLOCK - REGISTER/ADDRESS MAP - PPP APPLICATIONS ............................. 45

................................................................................................................................................................... 45

................................................................................................................................................................... 47

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