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AP72202 Datasheet(PDF) 22 Page - Diodes Incorporated

Part # AP72202
Description  HIGH-EFFICIENCY SYNCHRONOUS DC-DC BUCK-BOOST CONVERTER WITH 4.4A SWITCHES
PDF  30 Pages
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Manufacturer  DIODES [Diodes Incorporated]
Direct Link  http://www.diodes.com
Logo DIODES - Diodes Incorporated

AP72202 Datasheet(HTML) 22 Page - Diodes Incorporated

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AP72202
Document number: DS46304 Rev. 1 - 2
24 of 30
www.diodes.com
May 2024
© 2024 Copyright Diodes Incorporated. All Rights Reserved.
AP72202
Application Information (continued)
Reading from a Single Register
The I2C master device reads one byte of data from AP72202. The read byte protocol is as follows:
1.
The master sends a START condition.
2.
The master sends the 7-bit slave address followed by a write bit (R/nW = 0).
3.
The addressed slave sends an ACK bit by pulling SDA low.
4.
The master sends an 8-bit register pointer.
5.
The slave acknowledges the register pointer.
6.
The master sends a REPEATED START condition.
7.
The master sends the 7-bit slave address followed by a read bit (R/nW = 1).
8.
The addressed slave sends an ACK bit by pulling SDA low.
9.
The addressed slave places 8 bits of data on the bus from the register specified by the register pointer.
10. The master issues a nACK.
11. The master sends a STOP condition or a REPEATED START condition.
Figure 9. Reading from a Single Register X
Reading from a Sequential Register
Figure 10 below shows the protocol for reading from sequential registers. This protocol is similar to the read byte protocol except the master issues
an ACK to signal the slave that it wants more data.
The slave’s register pointer will auto-increment by one after each byte sent. When the master
has all the data it requires, it issues a nACK and a STOP to end the transmission. The continuous read from sequential registers protocol is as
follows:
1.
The master sends a START condition.
2.
The master sends the 7-bit slave address followed by a write bit (R/nW = 0).
3.
The addressed slave sends an ACK bit pulling SDA low.
4.
The master sends an 8-bit register pointer.
5.
The slave acknowledges the register pointer.
6.
The master sends a REPEATED START condition.
7.
The master sends the 7-bit slave address followed by a read bit (R/nW = 1).
8.
The addressed slave sends an ACK bit by pulling SDA low.
9.
The addressed slave places 8-bits of data on the bus from the register specified by the register pointer.
10. The master issues an ACK signaling the slave that it wishes to receive more data.
11. Steps 9 to 10 are repeated as many times as the master requires.
12. Following the last byte of data, the master must issue a nACK to signal that it wishes to stop receiving data.
13. The master sends a STOP condition or a REPEATED START condition.
Figure 10. Reading Continuously from Sequential Registers X to N
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