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TMS320DM355 Datasheet(PDF) 136 Page - Texas Instruments |
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TMS320DM355 Datasheet(HTML) 136 Page - Texas Instruments |
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136 / 153 page ![]() www.ti.com 23 19 18 22 20 21 17 18 28 Stop Start Repeated Start Stop SDA SCL 16 TMS320DM355 Digital Media System-on-Chip (DMSoC) SPRS463 – SEPTEMBER 2007 Table 5-34. Switching Characteristics for I2C Timings(1) (see Figure 5-40) DM355 STANDARD NO. PARAMETER FAST MODE UNIT MODE MIN MAX MIN MAX 16 tc(SCL) Cycle time, SCL 10 2.5 μs Delay time, SCL high to SDA low (for a repeated START 17 td(SCLH-SDAL) 4.7 0.6 μs condition) Delay time, SDA low to SCL low (for a START and a repeated 18 td(SDAL-SCLL) 4 0.6 μs START condition) 19 tw(SCLL) Pulse duration, SCL low 4.7 1.3 μs 20 tw(SCLH) Pulse duration, SCL high 4 0.6 μs 21 td(SDAV-SCLH) Delay time, SDA valid to SCL high 250 100 ns 22 tv(SCLL-SDAV) Valid time, SDA valid after SCL low (For I2C devices) 0 0 0.9 μs Pulse duration, SDA high between STOP and START 23 tw(SDAH) 4.7 1.3 μs conditions 28 td(SCLH-SDAH) Delay time, SCL high to SDA high (for STOP condition) 4 0.6 μs 29 Cp Capacitance for each I2C pin 10 10 pF (1) Cb = total capacitance of one bus line in pF. If mixed with HS-mode devices, faster fall-times are allowed. CAUTION The DM355 I 2C pins use a standard ±4-mA LVCMOS buffer, not the slow I/OP buffer defined in the I 2C specification. Series resistors may be necessary to reduce noise at the system level. Figure 5-40. I2C Transmit Timings 136 Peripheral Information and Electrical Specifications Submit Documentation Feedback |
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