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PM7347 Datasheet(PDF) 265 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 265 Page - PMC-Sierra, Inc |
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265 / 341 page ![]() S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 265 Document ID: PMC-1990267, Issue 3 Overhead Field Transmit Operation Receive Operation Growth: nominally programmed with all zeros. Access to these octets is provided by the PLCP transmit overhead access port. the RPOH pin. F1: User Channel This octet is unused and the value inserted in this octet is controlled by an internal register or by TPOH pin. This octet is ignored and is extracted on the RPOH pin. B1: Bit Interleaved Parity This octet contains an 8-bit interleaved parity (BIP) calculated across the entire PLCP frame (excluding the A1, A, Pn octets and the trailer). The B1 value is calculated based on even parity and the value inserted in the current frame is the BIP result calculated for the previous frame. The bit interleaved parity is calculated for the current frame and stored. The B1 octet contained in the subsequent frame is extracted and compared against the calculated value. Differences between the two values provide an indication of the end-to-end bit error rate. These differences are accumulated in a counter in the CPPM block. G1: Path Status The first four bit positions provide a PLCP FEBE function and indicates the number of B1 errors detected at the near end. The FEBE field has nine legal values (0000b-1000b) indicating between zero and eight B1 errors. The fifth bit position is used to transmit PLCP yellow alarm. The last three bit positions provide the link status signal used in IEEE- 802.6 DQDB implementations. Yellow alarm and link status signal insertion is controlled by the internal registers or by TPOH pin. The G1 byte provides the PLCP FEBE function and is accumulated in an a counter in the CPPM block. PLCP yellow alarm is detected or removed when the yellow bit is set to logic one or zero for ten consecutive frames. The yellow alarm state and the link status signal state are contained in the SPLR Status Register. M1, M2: Control Information These octets carry the DQDB layer management information. Internal register controls the nominal value inserted in these octets. These octets are unused in ATM Forum T3 UNI 3.0 specification. These octets are ignored and are extracted on the RPOH pin. C1: Cycle/Stuff Counter The coding of this octet depends on the PLCP frame format. For DS1 and E3 PLCP formats, this octet is programmed with all zeros. For the DS3 PLCP format, this octet indicates the number of stuff nibbles (13 or 14) at the end of each PLCP frame. The C1 value is varied in a three frame cycle where the first frame always contains 13 stuff nibbles, the second frame always contains 14 nibbles, and the third frame contains 13 or 14 nibbles. The stuffing may be varied by a nibble so that the PLCP frame rate can be locked to an external 8 kHz Interprets the trailer length according to the selected PLCP frame format and the received C1 code. |
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