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PM7347 Datasheet(PDF) 288 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 288 Page - PMC-Sierra, Inc |
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288 / 341 page ![]() S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 288 Document ID: PMC-1990267, Issue 3 6. IR#3 is the PRGD Pattern Insertion #3 Register 7. IR#4 is the PRGD Pattern Insertion #4 Register 8. The TINV bit and the RINV bit are contained in the PRGD Control Register 13.15 JTAG Support The S/UNI-JET supports the IEEE Boundary Scan Specification as described in the IEEE 1149.1 standards. The TAP consists of the five standard pins (TRSTB, TCK, TMS, TDI, and TDO) used to control the TAP controller and the boundary scan registers. The TRSTB input is the active-low reset signal used to reset the TAP controller. TCK is the test clock used to sample data on input, TDI and to output data on output, TDO. The TMS input is used to direct the TAP controller through its states. The basic boundary scan architecture is shown in Figure 23. Figure 23 Boundary Scan Architecture Boundary Scan Register Control TDI TDO Device Identification Register Bypass Register Instruction Register and Decode TRSTB TMS Test Access Port Controller Mux DFF Select Tri-state Enable TCK |
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