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PM7347 Datasheet(PDF) 186 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 186 Page - PMC-Sierra, Inc |
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186 / 341 page  S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 186 Document ID: PMC-1990267, Issue 3 Register 35AH: TDPR Lower Interrupt Threshold Bit Type Function Default Bit 7 Unused X Bit 6 R/W LINT[6] 0 Bit 5 R/W LINT[5] 0 Bit 4 R/W LINT[4] 0 Bit 3 R/W LINT[3] 0 Bit 2 R/W LINT[2] 1 Bit 1 R/W LINT[1] 1 Bit 0 R/W LINT[0] 1 LINT[6:0] The LINT[6:0] bits define the TDPR FIFO fill level which causes an internal interrupt (LFILLI) to be generated. Once the TDPR FIFO level decrements to empty or to a value less than LINT[6:0], LFILLI and BLFILL register bits will be set to logic one. LFILLI will cause an interrupt on INTB if LFILLE is set to logic one. The value of LINT[6:0] must always be less than the value of UTHR[6:0] unless both values are equal to 00H. |
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