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PM7347 Datasheet(PDF) 191 Page - PMC-Sierra, Inc |
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PM7347 Datasheet(HTML) 191 Page - PMC-Sierra, Inc |
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191 / 341 page ![]() S/UNI®-JET Data Sheet Released Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use 191 Document ID: PMC-1990267, Issue 3 Register 360H: RXCP-50 Configuration 1 Bit Type Function Default Bit 7 R/W DDSCR 0 Bit 6 R/W HDSCR 0 Bit 5 Unused X Bit 4 Unused X Bit 3 Unused X Bit 2 R/W HCSADD 1 Bit 1 R/W HCSDQDB 0 Bit 0 R/W DISCOR 0 DISCOR The DISCOR bit controls the HCS error correction algorithm. When DISCOR is a logic zero, the error correction algorithm is enabled, and single-bit errors detected in the cell header are corrected. When DISCOR is a logic one, the error correction algorithm is disabled, and any error detected in the cell header is treated as an uncorrectable HCS error. HCSDQDB The HCSDQDB bit enables HCS checking for either ATM type cells or DQDB type cells. When logic zero, ATM type cells are processed by checking all four octets in the header for HCS validation. When logic one, DQDB cells are processed by checking only three of the header octets (octets 2, 3 and 4) for HCS validation. HCSADD The HCSADD bit controls the addition of the coset polynomial, x6+x4+x2+1, to the HCS octet prior to comparison. When HCSADD is a logic one, the polynomial is added, and the resulting HCS is compared. When HCSADD is a logic zero, the polynomial is not added, and the unmodified HCS is compared. HDSCR HDSCR enables the self-synchronous x43 + 1 descrambler to continue running through the bytes which should contain the ATM cell headers. When HDSCR is set to logic zero, the descrambling polynomial will function only over the ATM payload bytes. When HDSCR is set to logic one, the descrambling polynomial will function over all bytes, including the five ATM header bytes. This function is available for use with PPP packets and flags which are scrambled at the source to prevent the generation of "killer" sequences. |
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