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C8051F360 Datasheet(PDF) 84 Page - Silicon Laboratories |
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C8051F360 Datasheet(HTML) 84 Page - Silicon Laboratories |
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84 / 288 page ![]() C8051F360/1/2/3/4/5/6/7/8/9 84 Rev. 1.0 MOV direct, @Ri Move indirect RAM to direct byte 2 2 MOV direct, #data Move immediate to direct byte 3 3 MOV @Ri, A Move A to indirect RAM 1 2 MOV @Ri, direct Move direct byte to indirect RAM 2 2 MOV @Ri, #data Move immediate to indirect RAM 2 2 MOV DPTR, #data16 Load DPTR with 16-bit constant 3 3 MOVC A, @A+DPTR Move code byte relative DPTR to A 1 3 MOVC A, @A+PC Move code byte relative PC to A 1 3 MOVX A, @Ri Move external data (8-bit address) to A 1 3 MOVX @Ri, A Move A to external data (8-bit address) 1 3 MOVX A, @DPTR Move external data (16-bit address) to A 1 3 MOVX @DPTR, A Move A to external data (16-bit address) 1 3 PUSH direct Push direct byte onto stack 2 2 POP direct Pop direct byte from stack 2 2 XCH A, Rn Exchange Register with A 1 1 XCH A, direct Exchange direct byte with A 2 2 XCH A, @Ri Exchange indirect RAM with A 1 2 XCHD A, @Ri Exchange low nibble of indirect RAM with A 1 2 Boolean Manipulation CLR C Clear Carry 1 1 CLR bit Clear direct bit 2 2 SETB C Set Carry 1 1 SETB bit Set direct bit 2 2 CPL C Complement Carry 1 1 CPL bit Complement direct bit 2 2 ANL C, bit AND direct bit to Carry 2 2 ANL C, /bit AND complement of direct bit to Carry 2 2 ORL C, bit OR direct bit to carry 2 2 ORL C, /bit OR complement of direct bit to Carry 2 2 MOV C, bit Move direct bit to Carry 2 2 MOV bit, C Move Carry to direct bit 2 2 JC rel Jump if Carry is set 2 2/3* JNC rel Jump if Carry is not set 2 2/3* JB bit, rel Jump if direct bit is set 3 3/4* JNB bit, rel Jump if direct bit is not set 3 3/4* JBC bit, rel Jump if direct bit is set and clear bit 3 3/4* Program Branching ACALL addr11 Absolute subroutine call 2 3* LCALL addr16 Long subroutine call 3 4* RET Return from subroutine 1 5* RETI Return from interrupt 1 5* AJMP addr11 Absolute jump 2 3* LJMP addr16 Long jump 3 4* SJMP rel Short jump (relative address) 2 3* JMP @A+DPTR Jump indirect relative to DPTR 1 3* Table 9.1. CIP-51 Instruction Set Summary (Continued) Mnemonic Description Bytes Clock Cycles |
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