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C8051F360 Datasheet(PDF) 93 Page - Silicon Laboratories

Part # C8051F360
Description  Mixed Signal ISP Flash MCU Family
PDF  288 Pages
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Manufacturer  SILABS [Silicon Laboratories]
Direct Link  http://www.silabs.com
Logo SILABS - Silicon Laboratories

C8051F360 Datasheet(HTML) 93 Page - Silicon Laboratories

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Rev. 1.0
93
C8051F360/1/2/3/4/5/6/7/8/9
On the execution of the RETI instruction in the ADC0 Window Comparator ISR, the value in SFRPAGE
register is overwritten with the contents of SFRNEXT. The CIP-51 may now access the OSCICN SFR bits
as it did prior to the interrupts occurring. See Figure 9.8 below.
0x0F
(OSCICN)
SFRPAGE
SFRLAST
SFRNEXT
SFR Page 0x00
Automatically
popped off of the
stack on return from
interrupt
SFRNEXT
popped to
SFRPAGE
Figure 9.8. SFR Page Stack Upon Return From ADC2 Window Interrupt
Note that in the above example, all three bytes in the SFR Page Stack are accessible via the SFRPAGE,
SFRNEXT, and SFRLAST special function registers. If the stack is altered while servicing an interrupt, it is
possible to return to a different SFR Page upon interrupt exit than selected prior to the interrupt call. Direct
access to the SFR Page stack can be useful to enable real-time operating systems to control and manage
context switching between multiple tasks.
Push operations on the SFR Page Stack only occur on interrupt service, and pop operations only occur on
interrupt exit (execution on the RETI instruction). The automatic switching of the SFRPAGE and operation
of the SFR Page Stack as described above can be disabled in software by clearing the SFR Automatic
Page Enable Bit (SFRPGEN) in the SFR Page Control Register (SFR0CN). See SFR Definition 9.1.



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