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C8051F360 Datasheet(PDF) 233 Page - Silicon Laboratories |
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C8051F360 Datasheet(HTML) 233 Page - Silicon Laboratories |
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233 / 288 page ![]() Table 19.7. Timer Settings for Standard Baud Rates Using the PLL Notes: 1. SCA1 –SCA0 and T1M bit definitions can be found in Section 21.1. 2. X = Don’t care. Rev. 1.0 233 C8051F360/1/2/3/4/5/6/7/8/9 Table 19.8. Timer Settings for Standard Baud Rates Using the PLL Notes: 1. SCA1 –SCA0 and T1M bit definitions can be found in Section 21.1. 2. X = Don’t care. Frequency: 50.0 MHz Target Baud Rate (bps) Baud Rate % Error Oscilla- tor Divide Factor Timer Clock Source SCA1-SCA0 (pre-scale select)1 T1M1 Timer 1 Reload Value (hex) 230400 0.45% 218 SYSCLK XX2 1 0x93 115200 –0.01% 434 SYSCLK XX 1 0x27 57600 0.45% 872 SYSCLK/4 01 0 0x93 28800 –0.01% 1736 SYSCLK/4 01 0 0x27 14400 0.22% 3480 SYSCLK/12 00 0 0x6F 9600 –0.01% 5208 SYSCLK/12 00 0 0x27 2400 –0.01% 20832 SYSCLK/48 10 0 0x27 Frequency: 100.0 MHz Target Baud Rate (bps) Baud Rate % Error Oscilla- tor Divide Factor Timer Clock Source SCA1-SCA0 (pre-scale select)1 T1M1 Timer 1 Reload Value (hex) 230400 –0.01% 434 SYSCLK XX2 1 0x27 115200 0.45% 872 SYSCLK/4 01 0 0x93 57600 –0.01% 1736 SYSCLK/4 01 0 0x27 28800 0.22% 3480 SYSCLK/12 00 0 0x6F 14400 –0.47% 6912 SYSCLK/48 10 0 0xB8 9600 0.45% 10464 SYSCLK/48 10 0 0x93 |
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