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KS8893ML Datasheet(PDF) 90 Page - Micrel Semiconductor |
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KS8893ML Datasheet(HTML) 90 Page - Micrel Semiconductor |
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90 / 106 page  Micrel KS8893M/ML/MI June 2005 90 M9999-063005 0x11 Rx256to511Octets Total Rx packets (bad packets included) that are between 256 and 511 octets in length 0x12 Rx512to1023Octets Total Rx packets (bad packets included) that are between 512 and 1023 octets in length 0x13 Rx1024to1522Octets Total Rx packets (bad packets included) that are between 1024 and 1522 octets in length (upper limit depends on max packet size setting) 0x14 TxLoPriorityByte Tx lo-priority good octet count, including PAUSE packets 0x15 TxHiPriorityByte Tx hi-priority good octet count, including PAUSE packets 0x16 TxLateCollision The number of times a collision is detected later than 512 bit-times into the Tx of a packet 0x17 TxPausePkts Number of PAUSE frames transmitted by a port 0x18 TxBroadcastPkts Tx good broadcast packets (not including error broadcast or valid multicast packets) 0x19 TxMulticastPkts Tx good multicast packets (not including error multicast packets or valid broadcast packets) 0x1A TxUnicastPkts Tx good unicast packets 0x1B TxDeferred Tx packets by a port for which the 1st Tx attempt is delayed due to the busy medium 0x1C TxTotalCollision Tx total collision, half duplex only 0x1D TxExcessiveCollision A count of frames for which Tx fails due to excessive collisions 0x1E TxSingleCollision Successfully Tx frames on a port for which Tx is inhibited by exactly one collision 0x1F TxMultipleCollision Successfully Tx frames on a port for which Tx is inhibited by more than one collision Table 20. Port 1’s “Per Port” MIB Counters Indirect Memory Offsets Bit Name R/W Description Default 30-16 Reserved N/A Reserved N/A 15-0 Counter Value RO Counter Value 0 Table 21. Format of “All Port Dropped Packet” MIB Counters “All Port Dropped Packet” MIB counters are read using indirect memory access. The address offsets for these counters are shown in the following table: Offset Counter Name Description 0x100 Port1 TX Drop Packets TX packets dropped due to lack of resources 0x101 Port2 TX Drop Packets TX packets dropped due to lack of resources 0x102 Port3 TX Drop Packets TX packets dropped due to lack of resources 0x103 Port1 RX Drop Packets RX packets dropped due to lack of resources 0x104 Port2 RX Drop Packets RX packets dropped due to lack of resources 0x105 Port3 RX Drop Packets RX packets dropped due to lack of resources Table 22. “All Port Dropped Packet” MIB Counters Indirect Memory Offsets |
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