KS8893ML datasheet(35/106 Pages) MICREL

35 / 106 page

Micrel

KS8893M/ML/MI

June 2005

M9999-063005

The SNI interface is a bit wide data interface and therefore runs at the network bit rate (not encoded). An

additional signal on the transmit side indicates when data is valid. Similarly, the receive side has an indicator that

conveys when the data is valid.

For half duplex operation, the KS8893M’s SCOL signal is used to indicate that a collision has occurred during

transmission.

MII Management Interface (MIIM)

The KS8893M supports the IEEE 802.3 MII Management Interface, also known as the Management Data

Input/Output (MDIO) Interface. This interface allows upper-layer devices to monitor and control the states of the

KS8893M. An external device with MDC/MDIO capability is used to read the PHY status or configure the PHY

settings. Further detail on the MIIM interface is found in Clause 22.2.4.5 of the IEEE 802.3u Specification.

The MIIM interface consists of the following:

A physical connection that incorporates the data line (MDIO) and the clock line (MDC).

A specific protocol that operates across the aforementioned physical connection that allows an external

controller to communicate with the KS8893M device.

Access to a set of eight 16-bit registers, consisting of six standard MIIM registers [0:5] and two custom

MIIM registers [29, 31].

The following table depicts the MII Management Interface frame format.

Preamble

Start of

Frame

Read/Write

OP Code

PHY

Address

Bits [4:0]

REG

Address

Bits [4:0]

Data

Bits [15:0]

Idle

Read

32 1’s

AAAAA

RRRRR

DDDDDDDD_DDDDDDDD

Write

32 1’s

AAAAA

RRRRR

DDDDDDDD_DDDDDDDD

Table 7. MII Management Interface Frame Format

KS8893ML Datasheet(PDF) 35 Page - Micrel Semiconductor

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