TLC6989 datasheet(33/72 Pages) TI1

33 / 72 page

7.6 Device Registers

DEVICE Registers Summary Table lists the memory-mapped registers for the Device registers. All register offset

addresses not listed in DEVICE Registers Summary Table should be considered as reserved locations and the

Table 7-3. DEVICE Registers Summary Table

Address

Acronym

Description

Section

0x0

DEVID

Device Identification

Section 7.6.1

0x1

SPICTRL

Control for SPI

Section 7.6.2

0x2

CCSICTRL

Control for Continuous Clock Serial Interface (CCSI)

Section 7.6.3

0x3

TXFFLVL

Transmission FIFO level control

Section 7.6.4

0x4

RXFFLVL

Receive FIFO level control

Section 7.6.5

0x5

DEVCTRL

Control register for Device

Section 7.6.6

0x6

DIAGMASK

Diagnostic masking

Section 7.6.7

0x7

STATUS

Global device status

Section 7.6.8

0x8

IFST

Detail Interface status

Section 7.6.9

0x9

TXFFST

Detail Transmit FIFO status

Section 7.6.10

0xA

RXFFST

Detail Receive FIFO status

Section 7.6.11

Complex bit access types are encoded to fit into small table cells. Table 7-4 shows the codes that are used for

access types in this section.

Table 7-4. Device Access Type Codes

Access Type

Code

Description

Read Type

Read

Write Type

Write

W1C

Write

1 to clear

Reset or Default Value

-n

Value after reset or the default

value

www.ti.com

TLC6989

SLVSHF5 – NOVEMBER 2024

Submit Document Feedback

Product Folder Links: TLC6989

TLC6989 Datasheet(PDF) 33 Page - Texas Instruments

TLC6989 Datasheet(HTML) 33 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72

Datasheet Download

Link URL