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TMPR4937 Datasheet(PDF) 370 Page - Toshiba Semiconductor

Part # TMPR4937
Description  64-Bit TX System RISC TX49 Family
PDF  552 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4937 Datasheet(HTML) 370 Page - Toshiba Semiconductor

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Chapter 11 Serial I/O Port
11-10
11.3.11 Error Detection/Interrupt Signaling
An interrupt is signaled if an error or an interrupt cause is detected, the corresponding status bit is set
and the corresponding Interrupt Enable bit is set.
The following figure shows the relationship between the status bit for each interrupt cause and each
interrupt enable bit. Please refer to the explanation for each status bit for more information about each
interrupt cause.
Figure 11.3.3 Relationship Between Interrupt Status Bits and Interrupt Signals
Transmission DMA Acknowledge
Reception DMA Acknowledge
Transmission DMA Acknowledge
SIDICR.TIE
SIDICR.RDE
SIDSR.TDIS
SIDISR.RDIS
SIDISR.TOUT
SIDICR.RIE
SIDICR.SPIE
SIDISR.ERI
To IRC
SIDISR.STIS
SIDICR.CTSAC
CTS Pin
“0” Write
SIDICR.STIE[5]
SISCISR.OERS
SIDICR.TDE
R
“0” Write
DMAC
R
SIDICR.STIE[4]
SISCISR.CTSS
S
SISCISR.RBRKD
SIDICR.STIE[3]
SISCISR.TRDY
SIDICR.STIE[2]
SISCISR.TXALS
SIDICR.STIE[1]
“0” Write
SISCISR.UBRKD
R
SIDICR.STIE[0]
“0” Write
R
“0” Write
R
R
“0” Write
R
“0” Write
DMAC
Transmission DMA Request
Transmission Data Empty
Frame Error
Overrun Error
CTS Status
During Break Reception
Transmission Complete
Transmission Data Empty
Break Detected
Parity Error
Reception Time Out
Reception Data Full



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