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TMPR4937 Datasheet(PDF) 404 Page - Toshiba Semiconductor

Part # TMPR4937
Description  64-Bit TX System RISC TX49 Family
PDF  552 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMPR4937 Datasheet(HTML) 404 Page - Toshiba Semiconductor

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Chapter 13 Parallel I/O Port
13-2
13.3 Detailed Description
13.3.1 Selecting PIO Pins
Of the 16-bit PIO signals, signals PIO[15:8] can be used in combination with 8-bit ECC check bit
signals. The configuration signal (ADDR[18]) at boot up determines which function will be used. See
3.3 Configuration Signals for more information.
13.3.2 General-purpose Parallel Port
The four following registers are used to control the PIO port.
•
PIO Output Data Register (PIODO)
•
PIO Input Data Register (PIODI)
•
PIO Direction Control Register (PIODIR)
•
PIO Open Drain Control Register (PIOOD)
PIO signals can be selected by the PIO Direction Control Register (PIODIR) for each bit as either
input or output.
Signals selected as output signals output the values written into the PIO Data Output Register
(PIODO). The PIO Open Drain Control Register (PIOOD) can select whether each bit is either an open
drain output or a totem pole output.
PIO signal status is indicated by the PIO Data Input Register. This register can be read out at any time
regardless of the pin direction settings.
13.4 Registers
Table 13.4.1 PIO Register Map
Offset Address
Mnemonic
Register Name
0xF500
PIODO
Output Data Register
0xF504
PIODI
Input Data Register
0xF508
PIODIR
Direction Control Register
0xF50C
PIOOD
Open Drain Control Register



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