TMPR4937 datasheet(400/552 Pages) TOSHIBA

400 / 552 page

Chapter 12 Timer/Counter

12-16

12.4.7 Pulse Generator Mode Register n (TMPGMRn)

TMPGMR0 0xF000

TMPGMR1 0xF130

Reserved

: Type

: Initial value

TPIBE TPIAE

Reserved

FFI

R/W

R/W : Type

: Initial value

Bit

Mnemonic

Field Name

Description

Read/Write

31:16

Reserved

⎯

TPIBE

TMCPRB

Interrupt Enable

Timer Pulse Generator Interrupt by TMCPRB Enable (Default: 0)

When in the Pulse Generator mode, this bit sets Interrupt Enable/Disable

for when TMCPRB and the counter value match.

0: Mask

1: Do not mask

R/W

TPIAE

TMCPRA

Interrupt Enable

Timer Pulse Generator Interrupt by TMCPRA Enable (Default: 0)

When in the Pulse Generator mode, this bit sets Interrupt Enable/Disable

for when TMCPRA and the counter value match.

0: Mask

1: Do not mask

R/W

13:1

Reserved

⎯

FFI

Flip Flop Default

Initial TIMER Output Level (Default: 0)

This bit specifies the TIMER[n] signal default when in the Pulse Generator

mode.

0: Low

1: High

R/W

Figure 12.4.7 Pulse Generator Mode Register

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