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TMPR4937 Datasheet(PDF) 398 Page - Toshiba Semiconductor |
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TMPR4937 Datasheet(HTML) 398 Page - Toshiba Semiconductor |
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398 / 552 page ![]() Chapter 12 Timer/Counter 12-14 12.4.5 Interval Timer Mode Register n (TMITMRn) TMITMR0 0xF010 TMITMR1 0xF110 TMITMR2 0xF210 31 16 Reserved : Type : Initial value 15 14 1 0 TIIE Reserved TZCE R/W R/W : Type 0 0 : Initial value Bit Mnemonic Field Name Description Read/Write 31:16 Reserved ⎯ 15 TIIE Interval Timer Interrupt Enable Timer Interval Interrupt Enable (Default: 0) Sets Interval Timer TMCPRA Interrupt Enable/Disable. 0: Disable (mask) 1: Enable R/W 14:1 Reserved ⎯ 0 TZCE Interval Timer Clear Enable Interval Timer Zero Clear Enable (Default: 0) This bit specifies whether or not to clear the counter to “0” after the count value matches Compare Register A. Count stops at this value if it is not cleared. 0: Do not clear 1: Clear R/W Figure 12.4.5 Interval Timer Mode Register |
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