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TMPR4937 Datasheet(PDF) 448 Page - Toshiba Semiconductor |
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TMPR4937 Datasheet(HTML) 448 Page - Toshiba Semiconductor |
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448 / 552 page  Chapter 15 Interrupt Controller 15-2 15.2 Block Diagram Figure 15.2.1 Interrupt Controller Outline TX49/H3 Core Set Interrupt Level Set Interrupt Mask Process Priority Interrupt Controller 6 Watchdog Timer Interrupt Non-maskable Interrupt Signal (NMI*) (active Low) External Interrupt Signal (INT[5:0]) [7:2] Internal Interrupt Signal 0 Interrupt Request (IP[7:2]) [6:2] [7] TINTDIS Internal Timer Interrupt Request Detection Circuit 1 ECC Error 1 TX49 Write time out Error 2 SIO[1:0] 4 DMA0[3:0] 1 1 PDMAC0 1 PCIC0 3 TMR[2:0] 1 PCIPME0 1 NDFMC 1 Flag Register Polarity Register Mask Register Interrupt Control Register Internal Interrupt Request PCIC REQ[1]*/INTOUT External Interrupt Request Non-maskable Interrupt Request 4 DMA1[3:0] ACLC 2 1 PCIERR0 1 ETHERC0 1 ETHERC1 1 PCIC1 1 SPI Watch-dog timer Interrupt (TMR2) (active Low) |
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