TMPR4937 datasheet(452/552 Pages) TOSHIBA

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Chapter 15 Interrupt Controller

15-6

15.3.4 Interrupt priority assigning

When multiple interrupt requests exist, the Interrupt Controller selects the interrupt with the highest

priority according to the priority level and interrupt number. Interrupt factors with an interrupt level

equal to or lower than the interrupt level specified by the Interrupt Mask Level Register (IRMSK) will

be excluded (masked).

When the interrupt with the highest priority is selected, then the interrupt number of that interrupt is

set in the interrupt factor field (CAUSE) of the Interrupt Current Status Register (IRCS), the interrupt

level is set in the Interrupt Level field (LVL), and the Interrupt Flag bit (IF) is set.

Priorities are assigned as follows.

•

When interrupt levels differ, the interrupt with the higher interrupt level has priority (Table

15.3.2)

•

When multiple interrupts with the same interrupt level are simultaneously detected, the

interrupt with the smaller interrupt number has priority (Table 15.3.1).

In the following cases, interrupts are reprioritized. If any new interrupt requests are generated before

reprioritization, the highest-priority interrupt is accepted, changing the Interrupt Cause (CAUSE) and

Interrupt Level (LVL) fields in the Interrupt Current Status (IRCS) register.

•

When an interrupt request with a higher interrupt level than that of the currently selected

interrupt is detected. If the interrupt levels are equal, the Interrupt Cause (CAUSE) field does

not change, even if the interrupt number is smaller.

•

When the interrupt level (IRLVLn.ILm) of the currently selected interrupt changes to a value

smaller than the current setting.

•

When the currently selected interrupt is cleared (refer to 15.3.6 Clearing interrupt requests).

Changing the Interrupt Mask Level (IRMSK.LML) does not cause the IRC to reprioritize interrupts.

However, if the Interrupt Mask Level (IRMSK.LML) is set to a value equal to or greater than the

current interrupt level (IRLVLn.ILm), the Interrupt Flag bit in the Interrupt Current Status register

(IRCS.IF) is set to mask the interrupt.

TMPR4937 Datasheet(PDF) 452 Page - Toshiba Semiconductor