 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
TMPR4937 Datasheet(PDF) 455 Page - Toshiba Semiconductor |
|
|
|||||||||||||||||||||||||||||
TMPR4937 Datasheet(HTML) 455 Page - Toshiba Semiconductor |
|
|
455 / 552 page  Chapter 15 Interrupt Controller 15-9 There are two flag registers: Flag Register 0 (IRFLAG0), and Flag Register 1 (IRFLAG1). These registers have two different Write methods. Accordingly, Writes to one register are reflects in the other. Either “0” or “1” can be written to Flag Register 0 In the case of Flag Register 1 however, “1” can be written from the TX49/H3 core, but “0” cannot be written. On the other hand, bits that wrote “1” are cleared to “0” in the case of access from a device other than the TX49/H3 core (access from an external PCI device for example). The bit value at this time will not change even if “0” is written. This register sends interrupt notification from the TX49/H3 core to external devices. External devices can be used in applications that clear these interrupt notifications. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
