TMPR4937 datasheet(474/552 Pages) TOSHIBA

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Chapter 15 Interrupt Controller

15-28

15.4.10 Interrupt Level Register 6 (IRLVL6)

0xF628

Reserved

IL29

Reserved

IL28

R/W

: Type

000

: Default

Reserved

IL13

Reserved

IL12

R/W

: Type

000

: Default

Bit

Mnemonic

Field Name

Explanation

Read/Write

31:27

⎯

Reserved

⎯

26:24

IL29

Interrupt level 29

Interrupt Level of INT [29] (Default: 000)

These bits specify the interrupt level of DMA1 [2] interrupts.

000: Interrupt level 0 (Interrupt disabled)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

R/W

23:19

⎯

Reserved

⎯

18:16

IL28

Interrupt level 28

Interrupt Level of INT [28] (Default: 000)

These bits specify the interrupt level of DMA1 [1] interrupts.

000: Interrupt level 0 (Interrupt disabled)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

R/W

15:11

⎯

Reserved

⎯

10:8

IL13

Interrupt level 13

Interrupt Level of INT [13] (Default: 000)

These bits specify the interrupt level of DMA0 [3] interrupts.

000: Interrupt level 0 (Interrupt disabled)

001: Interrupt level 1

010: Interrupt level 2

011: Interrupt level 3

100: Interrupt level 4

101: Interrupt level 5

110: Interrupt level 6

111: Interrupt level 7

R/W

7:3

⎯

Reserved

⎯

Figure 15.4.10 Interrupt Level Register 6 (1/2)

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