TC9328AF datasheet(38/84 Pages) TOSHIBA

38 / 84 page

TC9328AF

2004-09-13

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Programmable Counter

The programmable counter consists of two modulus prescaller, a 4-bit + 13-bit programmable counter and

a port to control these elements.

The programmable counter controls the ON/OFF functions for the contents of the reference port and

HOLD input status. By using external prescaller (TD6134AF/TD7101/04F) or 1 chip tuner IC that is

built-in for 1/16 prescaller (TA2142FN), it’s possible to reduce the emission from the tuner portion and

consumption current.

Programmable Counter Control Port

This port is controlling for division frequency, division method and operating current and gain of

prescaller.

The division method and power control of prescaller are accessed with the OUT1 instruction for which

[CN = 0H] has been specified in the operand.

The division frequency setting is accessed with the OUT1 instruction for which [CN = 1~5H] has been

specified and setting is by writing in the P16 bit (φL15). All data between P0 to P16 are updated when P16

is set. It is therefore necessary to access P16 even when updating only certain items of data and to perform

setting as the final process.

PSC output permission setup is used at the time of connection of external prescaller.

In the setup to prescaller IF input, if the bit is set to “1”, a programmable counter stops and prescaller

1/15 and 16 are fixed to 16 division. Usually, consisting of PLL, the bit is set to “0”.

(→ Refer IF counter item)

φL39

Prescaller

PSC

ENA

PSC output permission setup

0: Regular PLL composition

1: Prescaller division output is inputted to IF counter.

Prescaller IF counter input setup

0: PSC output prohibition

1: PSC output permission

A setup of the number of division of programmable counter

φL11

φL12

φL13

P10 P11

φL14

P12 P13 P14 P15

φL15

P16

LSB

MSB

φL10

PW0

PW1

Division method setting

Power control

TC9328AF Datasheet(PDF) 38 Page - Toshiba Semiconductor

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