TC9328AF datasheet(70/84 Pages) TOSHIBA

70 / 84 page

TC9328AF

2004-09-13

The data register is 16-bit register for which load the program memory data when the DAL instruction is

executed. The contents of this register are loaded into the data memory in 4-bit units with the execution of

the OUT1/IN1 instructions for which [CN = CH~FH] has been specified in the operand. This register can be

used for loading LCD segment decoding operations, radio band edge data and the data related to binary to

BCD conversion.

The DAL address register (DA) is 14-bit register for which specified the program memory indirectly when

the DAL instruction is executed. There are two kinds of operation methods of DAL instruction. The

control is selected by DAL bit. When DAL bit is set “0”, ADDR3 (6 bits) of the operand and contents of

general register (r) becomes the reference address of program memory and when DAL bit is set “1”, 14 bit

of DAL address register becomes reference address. At the time of setting DAL bit is “0” and execution of

DAL instruction, only program memory area (0000H~03FF) becomes reference area and DAL bit is set “1”

and execution of DAL instruction, all program memory area (0000H~3FFFH) becomes reference area.

If (DATA) → DA bit is set to “1”, it can transfer from the contents of data register to 14-bit DAL address

The contents of DAL address register are accessed the data in 4-bit units with the execution of the

OUT3/IN3 instruction for which [CN = BH] have been specified in the operand. DAL address register port

is setup by data select port (φL2D) for which divides and indirect specified. The data of a specification port

to set beforehand is set and the data port corresponding to it is accessed. Data select port is +1 incremented

whenever is accessed this port (φL3B, φK3B). For this reason, after setting up a data selection port, it can

access continuously.

DAL bit and (DATA) → DA bit are accessed with the execution of OUT3/IN3 instruction for which [CN =

AH] has been specified in the operand.

Note: DAL address register becomes effective only execution of DAL instruction when setting “1” and becomes

unrelated at the time of other instruction execution. It does not have the influence on this register by DAL

instruction.

Note: For this product have 8 K step of ROM Capacity, If 2000H - 3FFFH is specified to be DAL address

Note: It’s possible to write in and read out for data registeter and DAL address register. Please evacuate and

return in a data memory if needed at the time of interruption.

Note: There is no action when (DATA)

→ DA bit is set “0”. When it accesses to φK3A, it only read out only the

DAL bit. (The other bit is “0”.)

Carry F/F (Ca flag,

φKL1C)

This is set when Carry or Borrow is issued in the result of calculation instruction execution and is reset if

neither of these is issued. The carry F/F is accessed with OUT1/IN1 instructions for which [CN = CH] have

been specified. For this reason, evacuation and a return of the carry F/F at the time of interruption can be

performed easily. Carry F/F is written in a data memory by IN1 instruction at the time of evacuation, it is

evacuated, and the data evacuated by OUT1 instruction is transmitted to carry F/F from a data memory

after the time of a return.

φL/K1C

flag

*/0

Carry F/F

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