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TC9328AF Datasheet(PDF) 73 Page - Toshiba Semiconductor |
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TC9328AF Datasheet(HTML) 73 Page - Toshiba Semiconductor |
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73 / 84 page ![]() TC9328AF 2004-09-13 73 ○ MUTE Output This is a 1-bit CMOS output port for muting control purposes. 1. MUTE Port This port is accessed with the OUT1/IN1 instruction for which [CN = 8H] has been specified in the operand. MUTE output is used for muting control. Setting the MUTE bit to “1” suppresses the generation of noise when the linear circuit is switched, for example when the equipment is powered down, or when the I/O Port 1 input or HOLD input is used to switch band. This control is set up according to the contents of I/O bit and HOLD bit. POL bit sets up the logic of MUTE output. Please set up according to specification. 2. Circuit Configuration of MUTE Output φL/K18 Y1 Y2 Y4 Y8 MUTE I/O POL HOLD 0: Even if HOLD input status changes, MUTE output does not change. 1: By changing HOLD input status, MUTE bit is set to “1”. Control by change of HOLD input state changing 0: Positive logic: MUTE bit output without modification 1: Negative logic: MUTE bit inversed and output MUTE output polarity control 0: Even if I/O port -1 status changes, MUTE output doesn’t change. 1: By changing I/O port -1 status, MUTE bit is set to “1”. Control selection by changes in the I/O port-1input status 0: MUTE output set at “L” level during positive logic and “H” level during negative logic. 1: MUTE output set at “H” level during positive logic and “L” level during negative logic. MUTE output setting 30 I/O bit The signal of input change of I/O Port -1 HOLD bit The signal of HOLD input pin changing POL bit MUTE Reset signal MUTE bit S |
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