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TC9328AF Datasheet(PDF) 3 Page - Toshiba Semiconductor |
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TC9328AF Datasheet(HTML) 3 Page - Toshiba Semiconductor |
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3 / 84 page  TC9328AF 2004-09-13 3 Block Diagram INTR1 INTR2 (PCTRin) Port1 Port2 Port3 MUTE Port9 Port8 LCD Driver Doubler VEE (1.5 V) Doubler Reset Program Counter Stack regulator (8 Level) LCD Driver/Output Port ROM (16 × 8192 Steps) Data Reg (16 bit) Instruction Decoder RAM (4 × 512 words) X’tal OSC Peripheral CPU Vreg (1.5 V) Phase Comparator PLL XOUT XIN Vreg DO2 (OT/N) AMin IF Counter IFin1 (IN1) IFin2 (IN2) Up/Down Counter Timer Interrupt/ Counter Serial Interface Port4 P4-3 (SCK) P4-2 (SO) P4-1 (SI) P4-0 (BUZR) AD Converter Port5 P5-3 (ADin4) P5-2 (ADin3) P5-1 (ADin2) P5-0 (ADin1) G- regulator R/W Buffer VLCD P1-3 P1-0 P2-3 (PSC) P2-0 P3-3 P3-0 P9-3 (S22) P9-0 (S19) P8-3 (S18) P8-0 (S15) PSC MUTE VLCD HOLD TEST VDD GND VDB C1 C2 VEE C3 C4 VLCD ALU RESET VDB VDD DO1 (P) FMin BUZR VLCD Port6 P6-3 P6-0 Port7 P7-3 P7-0 |
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