| Electronic Components Datasheet Search |
|
F24 Datasheet(PDF) 64 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
F24 Datasheet(HTML) 64 Page - Renesas Technology Corp |
|
64 / 210 page ![]() RL78/F23, F24 3. ELECTRICAL SPECIFICATIONS (GRADE 3) R01DS0446EJ0120 Rev.1.20 Page 64 of 207 Dec 31, 2025 3.5 Peripheral Functions Characteristics 3.5.1 RAM can be written to Serial Array Unit (1) During communication at same potential (UART mode) (dedicated baud rate generator output) (TA = -40 to +105 °C, 2.7 V ≤ EVDD0 = EVDD1 = VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Transfer rate – fMCK/6 bps fCLK = 40 MHz, fMCK = fCLK Normal slew rate 6.6 Mbps Special slew rate 2 Mbps UART mode connection diagram (during communication at same potential) UART mode bit width (during communication at same potential) (reference) Caution Select the normal input buffer for the RXD0 pin and RXD1 pin and normal output mode for the TXD0 pin and TXD1 pin. Remark fMCK: Serial array unit operation clock frequency User's device RL78 microcontroller TXD0, TXD1 RXD0, RXD1 RX TX Baud rate error tolerance 1/Transfer rate High-/low-bit width TXD0, TXD1 RXD0, RXD1 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |