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F24 Datasheet(PDF) 74 Page - Renesas Technology Corp |
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F24 Datasheet(HTML) 74 Page - Renesas Technology Corp |
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74 / 210 page ![]() RL78/F23, F24 3. ELECTRICAL SPECIFICATIONS (GRADE 3) R01DS0446EJ0120 Rev.1.20 Page 74 of 207 Dec 31, 2025 (8) Communication at different potential (UART mode) (TXD output buffer: N-ch open-drain, RXD input buffer: TTL) (TA = -40 to +105 °C, 4.0 V ≤ EVDD0 = EVDD1 = VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V) Parameter Symbol Conditions MIN. TYP. MAX. Unit Transfer rate – Reception 2.7 V ≤ Vb ≤ EVDD0, VIH = 2.2 V, VIL = 0.8 V fMCK/6 bps Theoretical value of the maximum transfer rate Note (Cb = 30 pF) 5.3 Mbps Transmission 2.7 V ≤ Vb ≤ EVDD0, VOH = 2.2 V, VOL = 0.8 V Smaller number of the values given by fMCK/6 and expression 1 is applicable. bps Theoretical value of the maximum transfer rate Note (Cb = 30 pF) Normal slew rate 5.3 Mbps Note Expression 1: Maximum transfer rate = 1 / [{ -Cb × Rb × ln (1 - 2.2/Vb) } × 3] UART mode connection diagram (during communication at different potential) User's device RL78 microcontroller TXD0, TXD1 RXD0, RXD1 RX TX Vb Rb |
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