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WM8959 Datasheet(PDF) 137 Page - Wolfson Microelectronics plc |
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WM8959 Datasheet(HTML) 137 Page - Wolfson Microelectronics plc |
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137 / 155 page  Pre-Production WM8959 w PP, May 2008, Rev 3.1 137 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION 7:0 GPIO_POL[7:0] (rw) 00h GPIOn Input Polarity 0 = Non-inverted 1 = Inverted GPIO_POL[7]: GPI8 polarity GPIO_POL[6]: GPI7 polarity GPIO_POL[5]: Reserved GPIO_POL[4]: GPIO5 polarity GPIO_POL[3]: GPIO4 polarity GPIO_POL[2]: GPIO3 polarity GPIO_POL[1]: Reserved GPIO_POL[0]: GPIO1 polarity 15:9 00h Reserved - Do Not Change 8 IPVU[0] N/A Input PGA Volume Update Writing a 1 to this bit will cause all input PGA volumes to be updated simultaneously (LIN12, LIN34, RIN12 and RIN34) 7 LI12MUTE 1b LIN12 PGA Mute 0 = Disable Mute 1 = Enable Mute 6 LI12ZC 0b LIN12 PGA Zero Cross Detector 0 = Change gain immediately 1 = Change gain on zero cross only 5 0b Reserved - Do Not Change R24 (18h) LIN12 Input PGA Volume 4:0 LIN12VOL [4:0] 01011b LIN12 Volume (See Table 6 for PGA volume range) 15:9 00h Reserved - Do Not Change 8 IPVU[1] N/A Input PGA Volume Update Writing a 1 to this bit will cause all input PGA volumes to be updated simultaneously (LIN12, LIN34, RIN12 and RIN34) 7 LI34MUTE 1b LIN34 PGA Mute 0 = Disable Mute 1 = Enable Mute 6 LI34ZC 0b LIN34 PGA Zero Cross Detector 0 = Change gain immediately 1 = Change gain on zero cross only 5 0b Reserved - Do Not Change R25 (19h) LIN34 Input PGA Volume 4:0 LIN34VOL [4:0] 01011b LIN34 Volume (See Table 6 for PGA volume range) 15:9 00h Reserved - Do Not Change 8 IPVU[2] N/A Input PGA Volume Update Writing a 1 to this bit will cause all input PGA volumes to be updated simultaneously (LIN12, LIN34, RIN12 and RIN34) 7 RI12MUTE 1b RIN12 PGA Mute 0 = Disable Mute 1 = Enable Mute 6 RI12ZC 0b RIN12 PGA Zero Cross Detector 0 = Change gain immediately 1 = Change gain on zero cross only 5 0b Reserved - Do Not Change R26 (1Ah) RIN12 Input PGA Volume 4:0 RIN12VOL [4:0] 01011b RIN12 Volume (See Table 6 for PGA volume range) 15:9 00h Reserved - Do Not Change R27 (1Bh) RIN34 Input PGA Volume 8 IPVU[3] N/A Input PGA Volume Update Writing a 1 to this bit will cause all input PGA volumes to be updated simultaneously (LIN12, LIN34, RIN12 and RIN34) |
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