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38D2 Datasheet(PDF) 75 Page - Renesas Technology Corp |
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38D2 Datasheet(HTML) 75 Page - Renesas Technology Corp |
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75 / 136 page  Rev.3.02 Apr 10, 2008 Page 75 of 131 REJ03B0177-0302 38D2 Group <Notes on CPU Rewrite Mode> Take the notes described below when rewriting the flash memory in CPU rewrite mode. (1) Operation speed During CPU rewrite mode, set the system clock φ to 4.0 MHz or less using the main clock division ratio selection bits (bits 6 and 7 of address 003B16). (2) Instructions inhibited against use The instructions which refer to the internal data of the flash memory cannot be used during CPU rewrite mode. (3) Interrupts The interrupts cannot be used during CPU rewrite mode because they refer to the internal data of the flash memory. (4) Watchdog timer If the watchdog timer has been already activated, internal reset due to an underflow will not occur because the watchdog timer is surely cleared during program or erase. (5) Reset Reset is always valid. The MCU is activated using the boot mode at release of reset in the condition of CNVSS = “H”, so that the program will begin at the address which is stored in addresses FFFC16 and FFFD16 of the boot ROM area. |
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