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38D2 Datasheet(PDF) 76 Page - Renesas Technology Corp |
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38D2 Datasheet(HTML) 76 Page - Renesas Technology Corp |
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76 / 136 page ![]() Rev.3.02 Apr 10, 2008 Page 76 of 131 REJ03B0177-0302 38D2 Group Software Commands Table 17 lists the software commands. After setting the CPU rewrite mode select bit to “1”, execute a software command to specify an erase or program operation. Each software command is explained below. • Read Array Command (FF16) The read array mode is entered by writing the command code “FF16” in the first bus cycle. When an address to be read is input in one of the bus cycles that follow, the contents of the specified address are read out at the data bus (D0 to D7). The read array mode is retained until another command is written. • Read Status Register Command (7016) When the command code “7016” is written in the first bus cycle, the contents of the status register are read out at the data bus (D0 to D7) by a read in the second bus cycle. The status register is explained in the next section. • Clear Status Register Command (5016) This command is used to clear the bits SR4 and SR5 of the status register after they have been set. These bits indicate that operation has ended in an error. To use this command, write the command code “5016” in the first bus cycle. • Program Command (4016) Program operation starts when the command code “4016” is written in the first bus cycle. Then, if the address and data to program are written in the 2nd bus cycle, program operation (data programming and verification) will start. Whether the write operation is completed can be confirmed by read status register or the RY/BY status flag. To read the status register, write the read status register command “7016”. The status register bit 7 (SR7) is set to “0” at the same time the program starts and returned to “1” upon completion of the program. The read status mode remains active until the read array command (“FF16”) is written. The RY/BY status flag is set to “0” during program operation and “1” when the program operation is completed as is the status register bit 7 (SR7). At program end, program results can be checked by reading the status register. Fig 75. Program flowchart NOTES: 1. SRD = Status Register Data 2. WA = Write Address, WD = Write Data 3. BA = Block Address to be erased (Input the maximum address of each block.) 4. X denotes a given address in the User ROM area. Start Write “4016” SR7 = “1”? or RY/BY = “1”? Read status register Program completed NO YES Write Write address Write data SR4 = “0”? Program error NO YES Table 17 List of software commands (CPU rewrite mode) Command cycle number First bus cycle Second bus cycle Mode Address Data (D0 to D7) Mode Address Data (D0 to D7) Read array 1 Write X(4) FF16 Read status register 2 Write X 7016 Read X SRD(1) Clear status register 1 Write X 5016 Program 2 Write X 4016 Write WA(2) WD(2) Block erase 2 Write X 2016 Write BA(3) D016 |
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