38D2 datasheet(100/136 Pages) RENESAS

100 / 136 page

Rev.3.02

Apr 10, 2008

Page 100 of 131

REJ03B0177-0302

38D2 Group

NOTES:

1. tc(

φAD): one cycle of AD conversion clock. AD conversion clock can be selected from φSOURCE/2 or φSOURCE/8. φSOURCE

represents the XIN input in the frequency/2, 4 or 8 mode and internal on-chip oscillator divided by 4 in the on-chip oscillator mode or

the low-speed mode.

When the A/D conversion is executed in the frequency/2 mode, frequency/4 mode, or frequency/8 mode, set f(XIN)

≥ 500 kHz.

Relationship among AD conversion clock frequency, power source voltage, AD conversion mode and absolute accuracy.

Table 28 A/D converter characteristics

(Vcc = 2.0 to 5.5 V, Ta =

−20 to 85°C, output transistors in cut-off state, low-speed • on-chip oscillator mode

included, unless otherwise noted)

Symbol

Parameter

Test conditions

Limits

Unit

Min.

Typ.

Max.

−

Resolution

Bits

ABS

Absolute accuracy

(quantification error

excluded)

10bitAD

mode

4.5V

< VCC ≤ 5.5V,

AD conversion clock=f(XIN)/2, f(XIN)/8

≤ 6.25MHz

4LSB

4.0V

< VCC ≤ 4.5V,

AD conversion clock=

f(XIN)/2, f(XIN)/8

≤ 4MHz

2.2V

≤ VCC ≤ 4.0V,

AD conversion clock=f(XIN)/2, f(XIN)/8

≤ VccMHz

2.0V

≤ VCC ≤ 5.5V,

AD conversion clock=

f(OCO)/8, f(OCO)/32

8bitAD

mode

4.5V

< VCC ≤ 5.5V,

AD conversion clock=f(XIN)/2, f(XIN)/8

≤ 6.25MHz

4.0V

< VCC ≤ 4.5V,

AD conversion clock=

f(XIN)/2, f(XIN)/8

≤ 4MHz

2.2V

< VCC ≤ 4.0V,

AD conversion clock=f(XIN)/2, f(XIN)/8

≤ VccMHz

2.0V

≤ VCC ≤ 2.2V,

AD conversion clock=f(XIN)/2, f(XIN)/8

≤ (6Vcc−11)MHz

2.0V

≤ VCC ≤ 2.2V,

AD conversion clock=

f(XIN)/8

≤ VccMHz

2.0V

≤ VCC ≤ 5.5V,

AD conversion clock=

f(OCO)/8, f(OCO)/32

tCONV

Conversion time(1)

10bitAD mode

tc(

φAD)×61

tc(

φAD)×62 μs

8bitAD mode

tc(

φAD)×49

tc(

φAD)×50

RLADDER Ladder resistor

100

kΩ

IVREF

Reference input

current

VREF=5.0V

150

200

μA

IIA

Analog input current

5.0

μA

[MHz]

6.25

4.0

2.2

2.0

1.0

1.8 2.0 2.2

4.0 4.5

5.5 [V]

Power source voltage VCC

Note: f(XIN)

≥ 500kHz

f(XIN)/2 or f(XIN)/8

8bitAD=2LSB

f(XIN)/8

8bitAD=2LSB

f(XIN)/2 or f(XIN)/8

10bitAD=4LSB

8bitAD=2LSB

AD conversion clock

•frequency/2 mode,

frequency/4 and

frequency/8 mode:

f(XIN)/2 or

f(XIN)/8

10bitAD=4LSB

8bitAD=2LSB

AD conversion clock

•Low-speed mode and

on-chip oscillator mode:

f(OCO)/8 or

f(OCO)/32

(Note)

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