38D2 datasheet(78/136 Pages) RENESAS

78 / 136 page

Rev.3.02

Apr 10, 2008

Page 78 of 131

REJ03B0177-0302

38D2 Group

• Status Register

The status register shows the operating status of the flash

memory and whether erase operations and programs ended

successfully or in error. It can be read in the following ways:

(1) By reading an arbitrary address from the User ROM area

after writing the read status register command (7016)

(2) By reading an arbitrary address from the User ROM area in

the period from when the program starts or erase operation

starts to when the read array command (FF16) is input.

Also, the status register can be cleared by writing the clear status

After reset, the status register is set to “8016”.

Table 18 shows the status register. Each bit in this register is

explained below.

• Sequencer status (SR7)

The sequencer status indicates the operating status of the flash

memory. This bit is set to “0” (busy) during write or erase

operation and is set to “1” when these operations ends.

After power-on, the sequencer status is set to “1” (ready).

• Erase status (SR5)

The erase status indicates the operating status of erase operation.

If an erase error occurs, it is set to “1”. When the erase status is

cleared, it is reset to “0”.

• Program status (SR4)

The program status indicates the operating status of write

operation.

When a write error occurs, it is set to “1”.

The program status is reset to “0” when it is cleared.

If “1” is written for any of the SR5 and SR4 bits, the read array,

program, and block erase commands are not accepted. Before

executing these commands, execute the clear status register

command (5016) and clear the status register.

Also, if any commands are not correct, both SR5 and SR4 are set

to “1”.

Table 18 Definition of each bit in status register

Each bit of

SRD bits

Status name

Definition

“1”

“0”

SR7 (bit7)

Sequencer status

Ready

Busy

SR6 (bit6)

Reserved

−−

SR5 (bit5)

Erase status

Terminated in error

Terminated normally

SR4 (bit4)

Program status

Terminated in error

Terminated normally

SR3 (bit3)

Reserved

−−

SR2 (bit2)

Reserved

−−

SR1 (bit1)

Reserved

−−

SR0 (bit0)

Reserved

−−

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