HD64F36022 datasheet(151/384 Pages) RENESAS

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Section 10 Timer V

Rev. 4.00 Sep. 23, 2005 Page 125 of 354

REJ09B0025-0400

10.3.5

Timer Control Register V1 (TCRV1)

TCRV1 selects the edge at the TRGV pin, enables TRGV input, and selects the clock input to

TCNTV.

Bit

Bit Name

Initial

Value

R/W

Description

7 to 5



All 1



Reserved

These bits are always read as 1.

TVEG1

TVEG0

R/W

TRGV Input Edge Select

These bits select the TRGV input edge.

00: TRGV trigger input is prohibited

01: Rising edge is selected

10: Falling edge is selected

11: Rising and falling edges are both selected

TRGE

R/W

TCNT starts counting up by the input of the edge which is

selected by TVEG1 and TVEG0.

0: Disables starting counting-up TCNTV by the input of

the TRGV pin and halting counting-up TCNTV when

TCNTV is cleared by a compare match.

1: Enables starting counting-up TCNTV by the input of

the TRGV pin and halting counting-up TCNTV when

TCNTV is cleared by a compare match.



Reserved

This bit is always read as 1.

ICKS0

R/W

Internal Clock Select 0

This bit selects clock signals to input to TCNTV in

combination with CKS2 to CKS0 in TCRV0.

Refer to table 10.2.

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