HD64F36022 datasheet(157/384 Pages) RENESAS

157 / 384 page

Section 10 Timer V

Rev. 4.00 Sep. 23, 2005 Page 131 of 354

REJ09B0025-0400

10.5.2

Pulse Output with Arbitrary Pulse Width and Delay from TRGV Input

The trigger function can be used to output a pulse with an arbitrary pulse width at an arbitrary

delay from the TRGV input, as shown in figure 10.10. To set up this output:

1. Set bits CCLR1 and CCLR0 in TCRV0 so that TCNTV will be cleared by compare match with

TCORB.

2. Set bits OS3 to OS0 in TCSRV so that the output will go to 1 at compare match with TCORA

and to 0 at compare match with TCORB.

3. Set bits TVEG1 and TVEG0 in TCRV1 and set TRGE to select the falling edge of the TRGV

input.

4. Set bits CKS2 to CKS0 in TCRV0 and bit ICKS0 in TCRV1 to select the desired clock source.

5. After these settings, a pulse waveform will be output without further software intervention,

with a delay determined by TCORA from the TRGV input, and a pulse width determined by

(TCORB – TCORA).

Counter cleared

H'FF

TCORA

TCORB

H'00

TRGV

TMOV

Compare match A

Compare match B

clears TCNTV and

halts count-up

Compare match B

clears TCNTV and

halts count-up

Compare match A

TCNTV value

Time

Figure 10.10 Example of Pulse Output Synchronized to TRGV Input

HD64F36022 Datasheet(PDF) 157 Page - Renesas Technology Corp