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HD64F36022 Datasheet(PDF) 265 Page - Renesas Technology Corp |
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HD64F36022 Datasheet(HTML) 265 Page - Renesas Technology Corp |
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265 / 384 page  Section 17 List of Registers Rev. 4.00 Sep. 23, 2005 Page 239 of 354 REJ09B0025-0400 Section 17 List of Registers The register list gives information on the on-chip I/O register addresses, how the register bits are configured, and the register states in each operating mode. The information is given as shown below. 1. Register addresses (address order) • Registers are listed from the lower allocation addresses. • Registers are classified by functional modules. • The data bus width is indicated. • The number of access states is indicated. 2. Register bits • Bit configurations of the registers are described in the same order as the register addresses. • Reserved bits are indicated by in the bit name column. • When registers consist of 16 bits, bits are described from the MSB side. 3. Register states in each operating mode • Register states are described in the same order as the register addresses. • The register states described here are for the basic operating modes. If there is a specific reset for an on-chip peripheral module, refer to the section on that on-chip peripheral module. |
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