SH7101 datasheet(526/560 Pages) RENESAS

526 / 560 page

Section 20 Electrical Characteristics

Rev.1.00 Sep. 18, 2008 Page 492 of 522

REJ09B0069-0100

20.3.2

Clock Timing

Table 20.4 shows the clock timing.

Table 20.4

Clock Timing

Conditions: V

CC = 4.0 V to 5.5 V, AVCC = 4.0 V to 5.5 V, VSS = PLLVSS = AVSS = 0 V, Ta = –20°C

to +75

°C (standard product*), T

a = –40°C to +85°C (wide temperature-range

product*)

Item

Symbol

Min.

Max.

Unit

Figures

50-MHz operation*

Operating frequency

40-MHz operation*

MHz

50-MHz operation*

100

Clock cycle time

40-MHz operation*

cyc

100

Clock low-level pulse width

—

Clock high-level pulse width

—

Clock rise time

—

Clock fall time

—

Figure 20.2

50-MHz operation*

12.5

EXTAL clock input

frequency

40-MHz operation*

10.0

MHz

50-MHz operation*

250

EXTAL clock input

cycle time

40-MHz operation*

EXcyc

100

250

50-MHz operation*

—

EXTAL clock input

low-level pulse width

40-MHz operation*

EXL

50-MHz operation*

—

EXTAL clock input

high-level pulse width

40-MHz operation*

EXH

EXTAL clock input rise time

EXR

—

EXTAL clock input fall time

EXF

—

Figure 20.3

Reset oscillation settling time

OSC1

—

Standby return oscillation settling time

OSC2

—

Figure 20.4

Clock cycle time for peripheral modules

pcyc

100

—

Note:

* For details on correspondence of the standard product, wide temperature-range product,

and product model name, refer to description of maximum operating frequency and

operating temperature range in section 1.1, Features.

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