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SH7101 Datasheet(PDF) 25 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 25 Page - Renesas Technology Corp |
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25 / 560 page ![]() Rev.1.00 Sep. 18, 2008 Page xxv of xxxiv REJ09B0069-0100 Figure 8.103 Error Occurrence in Phase Counting Mode, Recovery in Phase Counting Mode ............................................................................................ 251 Figure 8.104 Error Occurrence in Complementary PWM Mode, Recovery in Normal Mode ......................................................................................................... 252 Figure 8.105 Error Occurrence in Complementary PWM Mode, Recovery in PWM Mode 1 ......................................................................................................... 253 Figure 8.106 Error Occurrence in Complementary PWM Mode, Recovery in ComplementaryPWM Mode .................................................................................. 254 Figure 8.107 Error Occurrence in Complementary PWM Mode, Recovery in Complementary PWM Mode ................................................................................. 255 Figure 8.108 Error Occurrence in Complementary PWM Mode, Recovery in Reset-Synchronous PWM Mode ............................................................................ 256 Figure 8.109 Error Occurrence in Reset-Synchronous PWM Mode, Recovery in Normal Mode ..................................................................................... 257 Figure 8.110 Error Occurrence in Reset-Synchronous PWM Mode, Recovery in PWM Mode 1..................................................................................... 258 Figure 8.111 Error Occurrence in Reset-Synchronous PWM Mode, Recovery in Complementary PWM Mode ............................................................. 259 Figure 8.112 Error Occurrence in Reset-Synchronous PWM Mode, Recovery in Reset-Synchronous PWM Mode........................................................ 260 Figure 8.113 POE Block Diagram............................................................................................... 262 Figure 8.114 Low-Level Detection Operation............................................................................. 268 Figure 8.115 Output-Level Detection Operation ......................................................................... 269 Figure 8.116 Falling Edge Detection Operation .......................................................................... 270 Section 9 Watchdog Timer Figure 9.1 Block Diagram of WDT ......................................................................................... 272 Figure 9.2 Operation in Watchdog Timer Mode...................................................................... 277 Figure 9.3 Operation in Interval Timer Mode.......................................................................... 277 Figure 9.4 Timing of Setting OVF........................................................................................... 278 Figure 9.5 Timing of Setting WOVF....................................................................................... 279 Figure 9.6 Writing to TCNT and TCSR .................................................................................. 280 Figure 9.7 Writing to RSTCSR................................................................................................ 280 Figure 9.8 Contention between TCNT Write and Increment................................................... 281 Figure 9.9 Example of System Reset Circuit Using WDTOVF Signal ................................... 282 Section 10 Serial Communication Interface (SCI) Figure 10.1 Block Diagram of SCI............................................................................................ 284 Figure 10.2 Data Format in Asynchronous Communication (Example with 8-Bit Data, Parity, Two Stop Bits) ............................................................................................ 301 |
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